• Ivan Djelic's avatar
    mtd: nand: omap: add support for hardware BCH ecc · 0e618ef0
    Ivan Djelic authored
    Two modes are supported: 4-bit and 8-bit error correction.
    Note that 4-bit mode is only confirmed to work on OMAP3630 ES 1.x,
    x >= 1. The OMAP3 GPMC hardware BCH engine computes remainder
    polynomials, it does not provide automatic error location and
    correction: this step is implemented using the BCH library.
    
    This implementation only protects page data, there is no support
    for protecting user-defined spare area bytes (this could be added
    with few modifications); therefore, it cannot be used with YAFFS2
    or other similar filesystems that depend on oob storage.
    
    Before being stored to nand flash, hardware BCH ecc is adjusted
    so that an erased page has a valid ecc; thus allowing correction of
    bitflips in blank pages (also common on 4-bit devices).
    
    BCH correction mode is selected at runtime by setting platform data
    parameter 'ecc_opt' to value OMAP_ECC_BCH4_CODE_HW or
    OMAP_ECC_BCH8_CODE_HW.
    
    This code has been tested with mtd test modules, UBI and UBIFS on a
    BeagleBoard revC3 (OMAP3530 ES3.0 + Micron NAND 256MiB 1,8V 16-bit).
    Signed-off-by: default avatarIvan Djelic <ivan.djelic@parrot.com>
    Signed-off-by: default avatarArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
    Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
    0e618ef0
omap2.c 37.9 KB