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Michael Hennerich authored
Some processors have groups of pins that aren't an even number of 16. This causes the array size calculation to under count the number of needed entries due to integer truncation. So on the BF51x, while we should have 3 bitmaps (41 / 16), we end up with 2 and pin requests for the 3rd bank end up scribbling over the top of the GPIO IRQ array. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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