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Sibi Sankar authored
Fixup the register regions used by the cpufreq node on SC7280 SoC to support per core L3 DCVS. Fixes: 7dbd121a ("arm64: dts: qcom: sc7280: Add cpufreq hw node") Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1627581885-32165-4-git-send-email-sibis@codeaurora.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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