• Jiaxun Yang's avatar
    MIPS: Loongson64: Remove CPU_HAS_WB · 162e134a
    Jiaxun Yang authored
    Q: Do we have really have write buffer
    A: Yes, on newer Loongson processors there is a "store fill buffer"
       that will collect *cached* writes, on all Loongson processors
       AXI crossbar will buffer all writes.
    
    Q: Then why do we want to remove CPU_HAS_WB?
    A: Because CPU_HAS_WB introduces wbflush, which intends to flush
       all write reuqests to mmio device. We won't be affected by store
       fill buffer because it won't buffer uncached writes. And a regular
       memory barrier is sufficient to flush crossbar write buffer.
    Signed-off-by: default avatarJiaxun Yang <jiaxun.yang@flygoat.com>
    Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
    162e134a
setup.c 466 Bytes