• Luca Ceresoli's avatar
    fpga manager: xilinx-spi: fix write_complete timeout handling · 16b7856d
    Luca Ceresoli authored
    If this routine sleeps because it was scheduled out, it might miss DONE
    going asserted and consider it a timeout. This would potentially make the
    code return an error even when programming succeeded. Rewrite the loop to
    always check DONE after checking if timeout expired so this cannot happen
    anymore.
    
    While there, also add error checking for gpiod_get_value(). Also avoid
    checking the DONE GPIO in two places, which would make the error-checking
    code duplicated and more annoying.
    
    The new loop it written to still guarantee that we apply 8 extra CCLK
    cycles after DONE has gone asserted, which is required by the hardware.
    Reported-by: default avatarTom Rix <trix@redhat.com>
    Reviewed-by: default avatarTom Rix <trix@redhat.com>
    Signed-off-by: default avatarLuca Ceresoli <luca@lucaceresoli.net>
    Signed-off-by: default avatarMoritz Fischer <mdf@kernel.org>
    16b7856d
xilinx-spi.c 6.16 KB