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Boris Ostrovsky authored
Currently when a CPU is off-lined it enters either MWAIT-based idle or, if MWAIT is not desired or supported, HLT-based idle (which places the processor in C1 state). This patch allows processors without MWAIT support to stay in states deeper than C1. Signed-off-by:
Boris Ostrovsky <boris.ostrovsky@amd.com> Signed-off-by:
Len Brown <len.brown@intel.com>
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