• Matthew Auld's avatar
    drm/i915/uapi: apply ALLOC_GPU_ONLY by default · 1dbd07e0
    Matthew Auld authored
    On small BAR configurations, when dealing with I915_MEMORY_CLASS_DEVICE
    allocations, we assume that by default, all userspace allocations should
    be placed in the non-CPU visible portion.  Note that dumb buffers are
    not included here, since these are not "GPU accelerated" and likely need
    CPU access. We choose to just always set GPU_ONLY, and let the backend
    figure out if that should be ignored or not, for example on full BAR
    systems.
    
    In a later patch userspace will be able to provide a hint if CPU access
    to the buffer is needed.
    
    v2(Thomas)
     - Apply GPU_ONLY on all discrete devices, but only if the BO can be
       placed in LMEM. Down in the depths this should be turned into a noop,
       where required, and as an annotation it still make some sense. If we
       apply it regardless of the placements then we end up needing to check
       the placements during exec capture. Also it's slightly inconsistent
       since the NEEDS_CPU_ACCESS can only be applied on objects that can be
       placed in LMEM. The other annoyance would be gem_create_ext vs plain
       gem_create, if we were to always apply GPU_ONLY.
    
    Testcase: igt@gem-create@create-ext-cpu-access-sanity-check
    Testcase: igt@gem-create@create-ext-cpu-access-big
    Signed-off-by: default avatarMatthew Auld <matthew.auld@intel.com>
    Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
    Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
    Cc: Jon Bloomfield <jon.bloomfield@intel.com>
    Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
    Cc: Jordan Justen <jordan.l.justen@intel.com>
    Cc: Kenneth Graunke <kenneth@whitecape.org>
    Cc: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
    Reviewed-by: default avatarThomas Hellström <thomas.hellstrom@linux.intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20220629174350.384910-5-matthew.auld@intel.com
    1dbd07e0
i915_gem_create.c 10.6 KB