• Noah Abradjian's avatar
    drm/amd/display: Make clk mgr the only dto update point · 1ea8751b
    Noah Abradjian authored
    [Why]
    
    * Clk Mgr DTO update point did not cover all needed updates, as it included a
      check for plane_state which does not exist yet when the updater is called on
      driver startup
    * This resulted in another update path in the pipe programming sequence, based
      on a dppclk update flag
    * However, this alternate path allowed for stray DTO updates, some of which would
      occur in the wrong order during dppclk lowering and cause underflow
    
    [How]
    
    * Remove plane_state check and use of plane_res.dpp->inst, getting rid
      of sequence dependencies (this results in extra dto programming for unused
      pipes but that doesn't cause issues and is a small cost)
    * Allow DTOs to be updated even if global clock is equal, to account for
      edge case exposed by diags tests
    * Remove update_dpp_dto call in pipe programming sequence (leave update to
      dppclk_control there, as that update is necessary and shouldn't occur in clk
      mgr)
    * Remove call to optimize_bandwidth when committing state, as it is not needed
      and resulted in sporadic underflows even with other fixes in place
    Signed-off-by: default avatarNoah Abradjian <noah.abradjian@amd.com>
    Reviewed-by: default avatarJun Lei <Jun.Lei@amd.com>
    Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
    Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
    1ea8751b
dcn20_hwseq.c 76.6 KB