• Bartlomiej Zolnierkiewicz's avatar
    [PATCH] fixup for C1 Halt Disconnect problem on nForce2 chipsets · 2b44ea57
    Bartlomiej Zolnierkiewicz authored
    Based on information provided by "Allen Martin" <AMartin@nvidia.com>:
    
    A hang is caused when the CPU generates a very fast CONNECT/HALT cycle
    sequence.  Workaround is to set the SYSTEM_IDLE_TIMEOUT to 80 ns.
    This allows the state-machine and timer to return to a proper state within
    80 ns of the CONNECT and probe appearing together.  Since the CPU will not
    issue another HALT within 80 ns of the initial HALT, the failure condition
    is avoided.
    2b44ea57
fixup.c 9.2 KB