• Paul Mackerras's avatar
    powerpc: Handle most loads and stores in instruction emulation code · 350779a2
    Paul Mackerras authored
    This extends the instruction emulation infrastructure in sstep.c to
    handle all the load and store instructions defined in the Power ISA
    v3.0, except for the atomic memory operations, ldmx (which was never
    implemented), lfdp/stfdp, and the vector element load/stores.
    
    The instructions added are:
    
    Integer loads and stores: lbarx, lharx, lqarx, stbcx., sthcx., stqcx.,
    lq, stq.
    
    VSX loads and stores: lxsiwzx, lxsiwax, stxsiwx, lxvx, lxvl, lxvll,
    lxvdsx, lxvwsx, stxvx, stxvl, stxvll, lxsspx, lxsdx, stxsspx, stxsdx,
    lxvw4x, lxsibzx, lxvh8x, lxsihzx, lxvb16x, stxvw4x, stxsibx, stxvh8x,
    stxsihx, stxvb16x, lxsd, lxssp, lxv, stxsd, stxssp, stxv.
    
    These instructions are handled both in the analyse_instr phase and in
    the emulate_step phase.
    
    The code for lxvd2ux and stxvd2ux has been taken out, as those
    instructions were never implemented in any processor and have been
    taken out of the architecture, and their opcodes have been reused for
    other instructions in POWER9 (lxvb16x and stxvb16x).
    
    The emulation for the VSX loads and stores uses helper functions
    which don't access registers or memory directly, which can hopefully
    be reused by KVM later.
    Signed-off-by: default avatarPaul Mackerras <paulus@ozlabs.org>
    Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
    350779a2
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