• Kan Liang's avatar
    perf/x86/uncore: Fix event group support · 75be6f70
    Kan Liang authored
    The events in the same group don't start or stop simultaneously.
    Here is the ftrace when enabling event group for uncore_iio_0:
    
      # perf stat -e "{uncore_iio_0/event=0x1/,uncore_iio_0/event=0xe/}"
    
                <idle>-0     [000] d.h.  8959.064832: read_msr: a41, value
      b2b0b030		//Read counter reg of IIO unit0 counter0
                <idle>-0     [000] d.h.  8959.064835: write_msr: a48, value
      400001			//Write Ctrl reg of IIO unit0 counter0 to enable
      counter0. <------ Although counter0 is enabled, Unit Ctrl is still
      freezed. Nothing will count. We are still good here.
                <idle>-0     [000] d.h.  8959.064836: read_msr: a40, value
      30100                   //Read Unit Ctrl reg of IIO unit0
                <idle>-0     [000] d.h.  8959.064838: write_msr: a40, value
      30000			//Write Unit Ctrl reg of IIO unit0 to enable all
      counters in the unit by clear Freeze bit  <------Unit0 is un-freezed.
      Counter0 has been enabled. Now it starts counting. But counter1 has not
      been enabled yet. The issue starts here.
                <idle>-0     [000] d.h.  8959.064846: read_msr: a42, value 0
    			//Read counter reg of IIO unit0 counter1
                <idle>-0     [000] d.h.  8959.064847: write_msr: a49, value
      40000e			//Write Ctrl reg of IIO unit0 counter1 to enable
      counter1.   <------ Now, counter1 just starts to count. Counter0 has
      been running for a while.
    
    Current code un-freezes the Unit Ctrl right after the first counter is
    enabled. The subsequent group events always loses some counter values.
    
    Implement pmu_enable and pmu_disable support for uncore, which can help
    to batch hardware accesses.
    
    No one uses uncore_enable_box and uncore_disable_box. Remove them.
    Signed-off-by: default avatarKan Liang <kan.liang@linux.intel.com>
    Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
    Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
    Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
    Cc: Jiri Olsa <jolsa@redhat.com>
    Cc: Linus Torvalds <torvalds@linux-foundation.org>
    Cc: Mark Rutland <mark.rutland@arm.com>
    Cc: Namhyung Kim <namhyung@kernel.org>
    Cc: Stephane Eranian <eranian@google.com>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Cc: Vince Weaver <vincent.weaver@maine.edu>
    Cc: linux-drivers-review@eclists.intel.com
    Cc: linux-perf@eclists.intel.com
    Fixes: 087bfbb0 ("perf/x86: Add generic Intel uncore PMU support")
    Link: https://lkml.kernel.org/r/1572014593-31591-1-git-send-email-kan.liang@linux.intel.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
    75be6f70
uncore.h 16.1 KB