99% of the Makefiles are very simple target-wise:

o build modules as listed in $(obj-m) and 
o build $(L_TARGET)/$(O_TARGET) as a composite object containing $(obj-y)

However, there is one exception: typically arch/$ARCH/kernel Makefile
wants the same as above, plus
o build init_task.o, head.o, using the standard rules for built-in
  targets - i.e. they are supposed to be built in the same way as all
  the other targets listed in $(obj-y), but they should not be linked
  into arch/$ARCH/kernel/$(O_TARGET). Instead they'll be linked in
  directly in the final vmlinux link.

Currently this is achieved by overriding Rules.make's first_rule in 
arch/$ARCH/kernel/Makefile. This rather ad-hoc way relies on the knowing
how Rules.make works internally and at the same time does things behind
Rules.make's back. 

To clean this up, I'm introducing a new variable, supposed to be only
used in arch/$ARCH/kernel/Makefile:

$(EXTRA_TARGETS) can be used to declare additional objects which shall
be built in the current directory (using the flags for built-in objects),
but not linked into $(O_TARGET)/$(L_TARGET)

This patch only converts arch/i386/kernel/Makefile at this time, other
archs work the same way as before.

Apart from this, this patch also removes some "unexport ..." statements,
which are unnecessary since not exporting variables is the default and
renames the internal "all_targets" to "vmlinux", since it's actually
need for building vmlinux.