• Xiaojian Du's avatar
    drm/amd/pm: improve the fine grain tuning function for RV/RV2/PCO · 37f5d8b7
    Xiaojian Du authored
    This patch is to improve the fine grain tuning function for RV/RV2/PCO.
    This patch adds two new commands: "restore" and "commit".
    This function uses the pp_od_clk_voltage sysfs file to configure the min
    and max value of gfx clock frequency manually or restore the default value.
    
    Command guide:
    echo "s level value" > pp_od_clk_voltage
            "s" - set the sclk frequency
            "level" - 0 or 1, "0" represents the min value,  "1" represents
            the max value
            "value" - the target value of sclk frequency, it should be limited in the
            safe range
    echo "r" > pp_od_clk_voltage
            "r" - reset the sclk frequency, restore the default value instantly
    echo "c" > pp_od_clk_voltage
            "c" - commit the min and max value of sclk frequency to the system
            only after the commit command, the target values set by "s" command
            will take effect.
    Example:
    1)change power profile from "auto" to "manual"
            $ cat power_dpm_force_performance_level
            auto
            $ echo "manual" > power_dpm_force_performance_level
            $ cat power_dpm_force_performance_level
            manual
    2)check the default sclk frequency
            $ cat pp_od_clk_voltage
            OD_SCLK:
            0:        200Mhz
            1:       1400Mhz
            OD_RANGE:
            SCLK:     200MHz       1400MHz
    3)use "s" -- set command to configure the min and max sclk frequency
            $ echo "s 0 600" > pp_od_clk_voltage
            $ echo "s 1 1000" > pp_od_clk_voltage
            $ echo "c" > pp_od_clk_voltage
            $ cat pp_od_clk_voltage
            OD_SCLK:
            0:        600Mhz
            1:       1000Mhz
            OD_RANGE:
            SCLK:     200MHz       1400MHz
    4)use "r" -- reset command to restore the min or max sclk frequency
            $ echo "r" > pp_od_clk_voltage
            $ cat pp_od_clk_voltage
            OD_SCLK:
            0:        200Mhz
            1:       1400Mhz
            OD_RANGE:
            SCLK:     200MHz       1400MHz
    Signed-off-by: default avatarXiaojian Du <Xiaojian.Du@amd.com>
    Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
    Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
    37f5d8b7
smu10_hwmgr.c 44.2 KB