• James Hogan's avatar
    MIPS: Add defs & probing of extended CP0_EBase · 37fb60f8
    James Hogan authored
    The CP0_EBase register may optionally have a write gate (WG) bit to
    allow the upper bits to be written, i.e. bits 31:30 on MIPS32 since r3
    (to allow for an exception base outside of KSeg0/KSeg1 when segmentation
    control is in use) and bits 63:30 on MIPS64 (which also implies the
    extension of CP0_EBase to 64 bits long).
    
    The presence of this feature will need to be known about for VZ support
    in order to correctly save and restore all the bits of the guest
    CP0_EBase register, so add CPU feature definition and probing for this
    feature.
    
    Probing the WG bit on MIPS64 can be a bit fiddly, since 64-bit COP0
    register access instructions were UNDEFINED for 32-bit registers prior
    to MIPS r6, and it'd be nice to be able to probe without clobbering the
    existing state, so there are 3 potential paths:
    
    - If we do a 32-bit read of CP0_EBase and the WG bit is already set, the
      register must be 64-bit.
    
    - On MIPS r6 we can do a 64-bit read-modify-write to set CP0_EBase.WG,
      since the upper bits will read 0 and be ignored on write if the
      register is 32-bit.
    
    - On pre-r6 cores, we do a 32-bit read-modify-write of CP0_EBase. This
      avoids the potentially UNDEFINED behaviour, but will clobber the upper
      32-bits of CP0_EBase if it isn't a simple sign extension (which also
      requires us to ensure BEV=1 or modifying the exception base would be
      UNDEFINED too). It is hopefully unlikely a bootloader would set up
      CP0_EBase to a 64-bit segment and leave WG=0.
    
    [ralf@linux-mips.org: Resolved merge conflict.]
    Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
    Tested-by: default avatarMatt Redfearn <matt.redfearn@imgtec.com>
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/13223/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
    37fb60f8
cpu-features.h 12.9 KB