• Lorenzo Pieralisi's avatar
    drivers: bus: add ARM CCI support · ed69bdd8
    Lorenzo Pieralisi authored
    On ARM multi-cluster systems coherency between cores running on
    different clusters is managed by the cache-coherent interconnect (CCI).
    It allows broadcasting of TLB invalidates and memory barriers and it
    guarantees cache coherency at system level through snooping of slave
    interfaces connected to it.
    
    This patch enables the basic infrastructure required in Linux to handle and
    programme the CCI component.
    
    Non-local variables used by the CCI management functions called by power
    down function calls after disabling the cache must be flushed out to main
    memory in advance, otherwise incoherency of those values may occur if they
    are sitting in the cache of some other CPU when power down functions
    execute. Driver code ensures that relevant data structures are flushed
    from inner and outer caches after the driver probe is completed.
    
    CCI slave port resources are linked to set of CPUs through bus masters
    phandle properties that link the interface resources to masters node in
    the device tree.
    
    Documentation describing the CCI DT bindings is provided with the patch.
    Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Signed-off-by: default avatarNicolas Pitre <nicolas.pitre@linaro.org>
    ed69bdd8
Makefile 316 Bytes