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Grzegorz Jaszczyk authored
Commit 1140011e ("mmc: sdhci-pxav3: Modify clock settings for the SDR50 and DDR50 modes") has extended the Device Tree binding used to describe PXAv3 SDHCI controllers in order to be able to use the SDR50 and DDR50 modes. This commit updates the Device Tree description of the Armada 39x SDHCI controller in other to take advantage of this functionality. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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