• Bjorn Helgaas's avatar
    Merge branch 'pci/controller/qcom' · 45e981b8
    Bjorn Helgaas authored
    - Drop endpoint redundant masking of global IRQ events (Manivannan
      Sadhasivam)
    
    - Clarify unknown global IRQ message and only log it once to avoid a flood
      (Manivannan Sadhasivam)
    
    - Add Manivannan Sadhasivam as maintainer of qcom endpoint driver
      (Manivannan Sadhasivam)
    
    - Add 'linux,pci-domain' property to endpoint DT binding (Manivannan
      Sadhasivam)
    
    - Assign PCI domain number for endpoint controllers (Manivannan Sadhasivam)
    
    - Add 'qcom_pcie_ep' and the PCI domain number to IRQ names for endpoint
      controller (Manivannan Sadhasivam)
    
    - Add global SPI interrupt for PCIe link events to DT binding (Manivannan
      Sadhasivam)
    
    - Add global RC interrupt handler to handle 'Link up' events and
      automatically enumerate hot-added devices (Manivannan Sadhasivam)
    
    - Avoid mirroring of DBI and iATU register space so it doesn't overlap BAR
      MMIO space (Prudhvi Yarlagadda)
    
    - Enable controller resources like PHY only after PERST# is deasserted to
      partially avoid the problem that the endpoint SoC crashes when accessing
      things when Refclk is absent (Manivannan Sadhasivam)
    
    - Rename dw_pcie.link_gen to max_link_speed to avoid ambiguity (Manivannan
      Sadhasivam)
    
    - Cache maximum link speed value in dw_pcie.max_link_speed for use by
      vendor drivers (Manivannan Sadhasivam)
    
    - Add 16.0 GT/s equalization and RX lane margining settings (Shashank Babu
      Chinta Venkata)
    
    - Pass domain number to pci_bus_release_domain_nr() explicitly to avoid a
      NULL pointer dereference (Manivannan Sadhasivam)
    
    * pci/controller/qcom:
      PCI: Pass domain number to pci_bus_release_domain_nr() explicitly
      PCI: qcom: Add RX lane margining settings for 16.0 GT/s
      PCI: qcom: Add equalization settings for 16.0 GT/s
      PCI: dwc: Always cache the maximum link speed value in dw_pcie::max_link_speed
      PCI: dwc: Rename 'dw_pcie::link_gen' to 'dw_pcie::max_link_speed'
      PCI: qcom-ep: Enable controller resources like PHY only after refclk is available
      PCI: qcom: Disable mirroring of DBI and iATU register space in BAR region
      PCI: qcom: Enumerate endpoints based on Link up event in 'global_irq' interrupt
      dt-bindings: PCI: qcom,pcie-sm8450: Add 'global' interrupt
      PCI: qcom-ep: Modify 'global_irq' and 'perst_irq' IRQ device names
      PCI: endpoint: Assign PCI domain number for endpoint controllers
      dt-bindings: PCI: pci-ep: Document 'linux,pci-domain' property
      dt-bindings: PCI: pci-ep: Update Maintainers
      PCI: qcom-ep: Reword the error message for receiving unknown global IRQ event
      PCI: qcom-ep: Drop the redundant masking of global IRQ events
    45e981b8
pci-imx6.c 47.4 KB