• Nicolin Chen's avatar
    ASoC: fsl_sai: Add clock controls for SAI · ca3e35c7
    Nicolin Chen authored
    The SAI mainly has the following clocks:
      bus clock
        control and configure registers and to generate synchronous
        interrupts and DMA requests.
    
      mclk1, mclk2, mclk3
        to generate the bit clock when the receiver or transmitter is
        configured for an internally generated bit clock.
    
    So this patch adds these clocks and their clock controls to the driver.
    
    [ To concern the old DTB cases, I've added a bit of extra code to make
      the driver compatible with them. And by marking clock NULL if failed
      to get, the clk_prepare() or clk_get_rate() would easily return 0
      so no further path should be broken. -- by Nicolin ]
    Signed-off-by: default avatarNicolin Chen <Guangyu.Chen@freescale.com>
    Acked-by: default avatarXiubo Li <Li.Xiubo@freescale.com>
    Signed-off-by: default avatarMark Brown <broonie@linaro.org>
    ca3e35c7
fsl-sai.txt 1.8 KB