• Joerg Roedel's avatar
    iommu/amd: Set exclusion range correctly · 3c677d20
    Joerg Roedel authored
    The exlcusion range limit register needs to contain the
    base-address of the last page that is part of the range, as
    bits 0-11 of this register are treated as 0xfff by the
    hardware for comparisons.
    
    So correctly set the exclusion range in the hardware to the
    last page which is _in_ the range.
    
    Fixes: b2026aa2 ('x86, AMD IOMMU: add functions for programming IOMMU MMIO space')
    Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
    3c677d20
amd_iommu_init.c 75.3 KB