• Vivien Didelot's avatar
    net: dsa: mv88e6xxx: add cap for MGMT Enables bits · 47395ed2
    Vivien Didelot authored
    Some switches provide a Rsvd2CPU mechanism used to choose which of the
    16 reserved multicast destination addresses matching 01:80:c2:00:00:0x
    should be considered as MGMT and thus forwarded to the CPU port.
    
    Other switches extend this mechanism to also configure as MGMT the
    additional 16 reserved multicast addresses matching 01:80:c2:00:00:2x.
    
    This mechanism is exposed via two registers in Global 2, and an Rsvd2CPU
    enable bit in the management register.
    
    Newer chip (such as 88E6390) has replaced these registers with a new
    indirect MGMT mechanism in Global 1.
    
    The patch adds two MV88E6XXX_FLAG_G2_MGMT_EN_{0,2}X flags to describe
    the presence of these Global 2 registers. If 88E6390 support is added, a
    MV88E6XXX_FLAG_G1_MGMT_CTRL flag will be needed to setup Rsvd2CPU.
    
    Note: all switches still support in parallel the ATU Load operation with
    an MGMT Entry State to forward such frames in a less convenient way.
    Signed-off-by: default avatarVivien Didelot <vivien.didelot@savoirfairelinux.com>
    Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
    Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    47395ed2
mv88e6xxx.h 21.3 KB