• Robert Richter's avatar
    perf, x86: Add support for AMD family 15h core counters · 4979d272
    Robert Richter authored
    This patch adds support for AMD family 15h core counters. There are
    major changes compared to family 10h. First, there is a new perfctr
    msr range for up to 6 counters. Northbridge counters are separate
    now. This patch only adds support for core counters. Second, certain
    events may only be scheduled on certain counters. For this we need to
    extend the event scheduling and constraints.
    
    We use cpu feature flags to calculate family 15h msr address offsets.
    This way we later can implement a faster ALTERNATIVE() version for
    this.
    Signed-off-by: default avatarRobert Richter <robert.richter@amd.com>
    Signed-off-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
    LKML-Reference: <20110215135210.GB5874@erda.amd.com>
    Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
    4979d272
perf_event.c 40.6 KB