• Lars Persson's avatar
    MIPS: Remove race window in page fault handling · 2a4a8b1e
    Lars Persson authored
    Multicore MIPSes without I/D hardware coherency suffered from a race
    condition in the page fault handler. The page table entry was
    published before any pending lazy D-cache flush was committed, hence
    it allowed execution of stale page cache data by other VPEs in the
    system.
    
    To make the cache handling safe we need to perform flushing already in
    the set_pte_at function. MIPSes without coherent I-caches can get a
    small increase in flushes due to the unavailability of the execute
    flag in set_pte_at.
    
    [ralf@linux-mips.org: outlining set_pte_at() saves a good k in a test
    build, so I moved its definition from pgtable.h to cache.c.]
    Signed-off-by: default avatarLars Persson <larper@axis.com>
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/7511/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
    2a4a8b1e
cache.c 7.14 KB