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Giuseppe CAVALLARO authored
We need to mask the MMC irq otherwise if we raise the mmc interrupts that are not handled the driver loops in the handler. In fact, by default all mmc counters (only used for stats) are managed in SW and registers are cleared on each READ. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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