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Shunli Wang authored
Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by:
Shunli Wang <shunli.wang@mediatek.com> Signed-off-by:
James Liao <jamesjj.liao@mediatek.com> Signed-off-by:
Erin Lo <erin.lo@mediatek.com> Tested-by:
John Crispin <blogic@openwrt.org> Reviewed-by:
Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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