• Nicolas Ferre's avatar
    ARM: at91: pm: cpu_idle: switch DDR to power-down mode · 56d75a16
    Nicolas Ferre authored
    [ Upstream commit 60b89f19 ]
    
    On some DDR controllers, compatible with the sama5d3 one,
    the sequence to enter/exit/re-enter the self-refresh mode adds
    more constrains than what is currently written in the at91_idle
    driver. An actual access to the DDR chip is needed between exit
    and re-enter of this mode which is somehow difficult to implement.
    This sequence can completely hang the SoC. It is particularly
    experienced on parts which embed a L2 cache if the code run
    between IDLE calls fits in it...
    
    Moreover, as the intention is to enter and exit pretty rapidly
    from IDLE, the power-down mode is a good candidate.
    
    So now we use power-down instead of self-refresh. As we can
    simplify the code for sama5d3 compatible DDR controllers,
    we instantiate a new sama5d3_ddr_standby() function.
    Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
    Cc: <stable@vger.kernel.org> # v4.1+
    Fixes: 017b5522 ("ARM: at91: Add new binding for sama5d3-ddramc")
    Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@free-electrons.com>
    Signed-off-by: default avatarSasha Levin <alexander.levin@verizon.com>
    56d75a16
pm.c 11 KB