• Gary R Hook's avatar
    crypto: ccp - Change ISR handler method for a v5 CCP · 6263b51e
    Gary R Hook authored
    The CCP has the ability to perform several operations simultaneously,
    but only one interrupt.  When implemented as a PCI device and using
    MSI-X/MSI interrupts, use a tasklet model to service interrupts. By
    disabling and enabling interrupts from the CCP, coupled with the
    queuing that tasklets provide, we can ensure that all events
    (occurring on the device) are recognized and serviced.
    
    This change fixes a problem wherein 2 or more busy queues can cause
    notification bits to change state while a (CCP) interrupt is being
    serviced, but after the queue state has been evaluated. This results
    in the event being 'lost' and the queue hanging, waiting to be
    serviced. Since the status bits are never fully de-asserted, the
    CCP never generates another interrupt (all bits zero -> one or more
    bits one), and no further CCP operations will be executed.
    
    Cc: <stable@vger.kernel.org> # 4.9.x+
    Signed-off-by: default avatarGary R Hook <gary.hook@amd.com>
    Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
    6263b51e
ccp-dev-v5.c 29.1 KB