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Xiaolong Wang authored
Add Denverton to the group of SandyBridge and later processors, to let the bclk be recognized as 100MHz rather than 133MHz, then avoid the wrong value of the frequencies based on it, including Bzy_MHz, max efficiency freuency, base frequency, and turbo mode frequencies. Signed-off-by: Xiaolong Wang <xiaolong.wang@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
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