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Xing Zheng authored
The range of the pclk_edp_div_con is [13:8] and 6 bits, not 5. Reported-by:
Lin Huang <hl@rock-chips.com> Signed-off-by:
Xing Zheng <zhengxing@rock-chips.com> Tested-by:
Lin Huang <hl@rock-chips.com> Signed-off-by:
Heiko Stuebner <heiko@sntech.de>
3e1531db