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Jon Medhurst authored
ARM data processing instructions which have a register specified shift are defined as UNPREDICTABLE if PC is used for any register, not just the shift value as the code was previous assuming. This issue manifests on A15 devices as either test case failures or undefined instructions aborts. Reported-by:
David Long <dave.long@linaro.org> Signed-off-by:
Jon Medhurst <tixy@linaro.org>
27222600