• Will Deacon's avatar
    kvm: arm64: vgic: fix hyp panic with 64k pages on juno platform · 63afbe7a
    Will Deacon authored
    If the physical address of GICV isn't page-aligned, then we end up
    creating a stage-2 mapping of the page containing it, which causes us to
    map neighbouring memory locations directly into the guest.
    
    As an example, consider a platform with GICV at physical 0x2c02f000
    running a 64k-page host kernel. If qemu maps this into the guest at
    0x80010000, then guest physical addresses 0x80010000 - 0x8001efff will
    map host physical region 0x2c020000 - 0x2c02efff. Accesses to these
    physical regions may cause UNPREDICTABLE behaviour, for example, on the
    Juno platform this will cause an SError exception to EL3, which brings
    down the entire physical CPU resulting in RCU stalls / HYP panics / host
    crashing / wasted weeks of debugging.
    
    SBSA recommends that systems alias the 4k GICV across the bounding 64k
    region, in which case GICV physical could be described as 0x2c020000 in
    the above scenario.
    
    This patch fixes the problem by failing the vgic probe if the physical
    base address or the size of GICV aren't page-aligned. Note that this
    generated a warning in dmesg about freeing enabled IRQs, so I had to
    move the IRQ enabling later in the probe.
    
    Cc: Christoffer Dall <christoffer.dall@linaro.org>
    Cc: Marc Zyngier <marc.zyngier@arm.com>
    Cc: Gleb Natapov <gleb@kernel.org>
    Cc: Paolo Bonzini <pbonzini@redhat.com>
    Cc: Joel Schopp <joel.schopp@amd.com>
    Cc: Don Dutile <ddutile@redhat.com>
    Acked-by: default avatarPeter Maydell <peter.maydell@linaro.org>
    Acked-by: default avatarJoel Schopp <joel.schopp@amd.com>
    Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
    Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
    Signed-off-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
    63afbe7a
vgic.c 49.9 KB