• Hersen Wu's avatar
    drm/amd/display: dsc mst 2 4K displays go dark with 2 lane HBR3 · 6513104b
    Hersen Wu authored
    [Why]
    call stack of amdgpu dsc mst pbn, slot num calculation is as below:
    -compute_bpp_x16_from_target_bandwidth
    -decide_dsc_target_bpp_x16
    -setup_dsc_config
    -dc_dsc_compute_bandwidth_range
    -compute_mst_dsc_configs_for_link
    -compute_mst_dsc_configs_for_state
    
    from pbn -> dsc target bpp_x16
    
    bpp_x16 is calulated by compute_bpp_x16_from_target_bandwidth.
    Beside pixel clock and bpp, num_slices_h and bpp_increment_div
    will also affect bpp_x16.
    
    from dsc target bpp_x16 -> pbn
    
    within dm_update_mst_vcpi_slots_for_dsc,
    pbn = drm_dp_calc_pbn_mode(clock, bpp_x16, true);
    
    drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc)
    {
      return DIV_ROUND_UP_ULL(mul_u32_u32(clock * (bpp / 16), 64 * 1006),
                8 * 54 * 1000 * 1000);
    }
    
    bpp / 16 trunc digits after decimal point. This will cause calculation
    delta. drm_dp_calc_pbn_mode does not have other informations,
    like num_slices_h, bpp_increment_div. therefore, it does not do revese
    calcuation properly from bpp_x16 to pbn.
    
    pbn from drm_dp_calc_pbn_mode is less than pbn from
    compute_mst_dsc_configs_for_state. This cause not enough mst slot
    allocated to display. display could not visually light up.
    
    [How]
    pass pbn from compute_mst_dsc_configs_for_state to
    dm_update_mst_vcpi_slots_for_dsc
    
    Cc: stable@vger.kernel.org
    Reviewed-by: default avatarScott Foster <Scott.Foster@amd.com>
    Acked-by: default avatarMikita Lipski <mikita.lipski@amd.com>
    Signed-off-by: default avatarHersen Wu <hersenwu@amd.com>
    Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
    Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
    6513104b
amdgpu_dm.c 322 KB