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Greentime Hu authored
This patch fixes that the sscratch register clearing in M-mode. It cleared sscratch register in M-mode, but it should clear mscratch register. That will cause kernel trap if the CPU core doesn't support S-mode when trying to access sscratch. Fixes: 9e806356 ("riscv: clear the instruction cache and all registers when booting") Signed-off-by:
Greentime Hu <greentime.hu@sifive.com> Reviewed-by:
Anup Patel <anup@brainfault.org> Signed-off-by:
Paul Walmsley <paul.walmsley@sifive.com>
d411cf02