• Ville Syrjälä's avatar
    drm/i915: Fix MST disable sequence · 7829c92b
    Ville Syrjälä authored
    When moving the pipe disable & co. function calls from
    haswell_crtc_disable() into the encoder .post_disable() hooks I
    neglected to account for the MST vs. DDI interactions properly.
    This now leads us to call these functions two times for the last
    MST stream (once from the MST code and a second time from the DDI
    code). The calls from the DDI code should only be done for SST
    and not MST. Add the proper check for that.
    
    This results in an MCE on ICL. My vague theory is that we turn off
    the transcoder clock from the MST code and then we proceed to touch
    something in the DDI code which still depends on that clock causing
    the hardware to become upset. Though I can't really explain why
    Stan's hack of omitting the pipe disable in the MST code would avoid
    the MCE since we should still be turning off the transcoder clock.
    But maybe there's something magic in the hw that keeps the clock on
    as long as the pipe is on. Or maybe the clock isn't the problem and
    we now touch something in the DDI disable code that really does need
    the pipe to be still enabled.
    
    v2: Rebase to latest drm-tip
    
    Cc: José Roberto de Souza <jose.souza@intel.com>
    Cc: Manasi Navare <manasi.d.navare@intel.com>
    Reported-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
    Closes: https://gitlab.freedesktop.org/drm/intel/issues/901
    Fixes: 773b4b54 ("drm/i915: Move stuff from haswell_crtc_disable() into encoder .post_disable()")
    Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20200108144550.29280-1-ville.syrjala@linux.intel.comReviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
    7829c92b
intel_ddi.c 146 KB