• Tobias Waldekranz's avatar
    net: dsa: mv88e6xxx: Improve indirect addressing performance · 7bca16b2
    Tobias Waldekranz authored
    Before this change, both the read and write callback would start out
    by asserting that the chip's busy flag was cleared. However, both
    callbacks also made sure to wait for the clearing of the busy bit
    before returning - making the initial check superfluous. The only
    time that would ever have an effect was if the busy bit was initially
    set for some reason.
    
    With that in mind, make sure to perform an initial check of the busy
    bit, after which both read and write can rely the previous operation
    to have waited for the bit to clear.
    
    This cuts the number of operations on the underlying MDIO bus by 25%
    Signed-off-by: default avatarTobias Waldekranz <tobias@waldekranz.com>
    Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
    Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    7bca16b2
chip.h 21.2 KB