Issuing register reads as a separate address write and data read transactions
means that other I2C activity could occur in between and state could get out
of sync.  Issue both the write and read in a single transaction so that the
i2c layer can prevent other users accessing the bus until we are complete.
Signed-off-by: Chris Pascoe <c.pascoe@itee.uq.edu.au>
Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>