-
Jing Huang authored
Clear PSS memory reset that is set as part of power-on-reset (pci reset). Complete PMM memory reset before BISTR start. Clear EDRAM BISTR start bit after fixed delay. BISTR DONE bit status is not getting set. Use a fixed 1ms delay for BISTR now. Expose PMM IT memory definitions to host. Signed-off-by: Jing Huang <huangj@brocade.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
df2a52a6