• Ankit Agrawal's avatar
    vfio/nvgrace-gpu: Convey kvm to map device memory region as noncached · 81617c17
    Ankit Agrawal authored
    The NVIDIA Grace Hopper GPUs have device memory that is supposed to be
    used as a regular RAM. It is accessible through CPU-GPU chip-to-chip
    cache coherent interconnect and is present in the system physical
    address space. The device memory is split into two regions - termed
    as usemem and resmem - in the system physical address space,
    with each region mapped and exposed to the VM as a separate fake
    device BAR [1].
    
    Owing to a hardware defect for Multi-Instance GPU (MIG) feature [2],
    there is a requirement - as a workaround - for the resmem BAR to
    display uncached memory characteristics. Based on [3], on system with
    FWB enabled such as Grace Hopper, the requisite properties
    (uncached, unaligned access) can be achieved through a VM mapping (S1)
    of NORMAL_NC and host mapping (S2) of MT_S2_FWB_NORMAL_NC.
    
    KVM currently maps the MMIO region in S2 as MT_S2_FWB_DEVICE_nGnRE by
    default. The fake device BARs thus displays DEVICE_nGnRE behavior in the
    VM.
    
    The following table summarizes the behavior for the various S1 and S2
    mapping combinations for systems with FWB enabled [3].
    S1           |  S2           | Result
    NORMAL_NC    |  NORMAL_NC    | NORMAL_NC
    NORMAL_NC    |  DEVICE_nGnRE | DEVICE_nGnRE
    
    Recently a change was added that modifies this default behavior and
    make KVM map MMIO as MT_S2_FWB_NORMAL_NC when a VMA flag
    VM_ALLOW_ANY_UNCACHED is set [4]. Setting S2 as MT_S2_FWB_NORMAL_NC
    provides the desired behavior (uncached, unaligned access) for resmem.
    
    To use VM_ALLOW_ANY_UNCACHED flag, the platform must guarantee that
    no action taken on the MMIO mapping can trigger an uncontained
    failure. The Grace Hopper satisfies this requirement. So set
    the VM_ALLOW_ANY_UNCACHED flag in the VMA.
    
    Applied over next-20240227.
    base-commit: 22ba90670a51
    
    Link: https://lore.kernel.org/all/20240220115055.23546-4-ankita@nvidia.com/ [1]
    Link: https://www.nvidia.com/en-in/technologies/multi-instance-gpu/ [2]
    Link: https://developer.arm.com/documentation/ddi0487/latest/ section D8.5.5 [3]
    Link: https://lore.kernel.org/all/20240224150546.368-1-ankita@nvidia.com/ [4]
    
    Cc: Alex Williamson <alex.williamson@redhat.com>
    Cc: Kevin Tian <kevin.tian@intel.com>
    Cc: Jason Gunthorpe <jgg@nvidia.com>
    Cc: Vikram Sethi <vsethi@nvidia.com>
    Cc: Zhi Wang <zhiw@nvidia.com>
    Signed-off-by: default avatarAnkit Agrawal <ankita@nvidia.com>
    Reviewed-by: default avatarJason Gunthorpe <jgg@nvidia.com>
    Link: https://lore.kernel.org/r/20240229193934.2417-1-ankita@nvidia.comSigned-off-by: default avatarAlex Williamson <alex.williamson@redhat.com>
    81617c17
main.c 25.4 KB