• Will Deacon's avatar
    ARM: 8898/1: mm: Don't treat faults reported from cache maintenance as writes · 83402036
    Will Deacon authored
    Translation faults arising from cache maintenance instructions are
    rather unhelpfully reported with an FSR value where the WnR field is set
    to 1, indicating that the faulting access was a write. Since cache
    maintenance instructions on 32-bit ARM do not require any particular
    permissions, this can cause our private 'cacheflush' system call to fail
    spuriously if a translation fault is generated due to page aging when
    targetting a read-only VMA.
    
    In this situation, we will return -EFAULT to userspace, although this is
    unfortunately suppressed by the popular '__builtin___clear_cache()'
    intrinsic provided by GCC, which returns void.
    
    Although it's tempting to write this off as a userspace issue, we can
    actually do a little bit better on CPUs that support LPAE, even if the
    short-descriptor format is in use. On these CPUs, cache maintenance
    faults additionally set the CM field in the FSR, which we can use to
    suppress the write permission checks in the page fault handler and
    succeed in performing cache maintenance to read-only areas even in the
    presence of a translation fault.
    Reported-by: default avatarOrion Hodson <oth@google.com>
    Signed-off-by: default avatarWill Deacon <will@kernel.org>
    Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
    83402036
fault.h 735 Bytes