• Stephen Warren's avatar
    gpu: host1x: handle the correct # of syncpt regs · 22bbd5d9
    Stephen Warren authored
    BIT_WORD() truncates rather than rounds, so the loops in
    syncpt_thresh_isr() and _host1x_intr_disable_all_syncpt_intrs() use <=
    rather than < in an attempt to process the correct number of registers
    when rounding of the conversion of count of bits to count of words is
    necessary. However, when rounding isn't necessary because the value is
    already a multiple of the divisor (as is the case for all values of
    nb_pts the code actually sees), this causes one too many registers to
    be processed.
    
    Solve this by using and explicit DIV_ROUND_UP() call, rather than
    BIT_WORD(), and comparing with < rather than <=.
    
    Fixes: 7ede0b0b ("gpu: host1x: Add syncpoint wait and interrupts")
    Cc: <stable@vger.kernel.org> # 3.10
    Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
    Acked-By: default avatarTerje Bergstrom <tbergstrom@nvidia.com>
    Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
    22bbd5d9
intr_hw.c 4.09 KB