• Jisheng Zhang's avatar
    mmc: sdhci: also get preset value and driver type for MMC_DDR52 · 96351f5e
    Jisheng Zhang authored
    commit 0dafa60e upstream.
    
    commit bb8175a8 ("mmc: sdhci: clarify DDR timing mode between
    SD-UHS and eMMC") added MMC_DDR52 as eMMC's DDR mode to be
    distinguished from SD-UHS, but it missed setting driver type for
    MMC_DDR52 timing mode.
    
    So sometimes we get the following error on Marvell BG2Q DMP board:
    
    [    1.559598] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd
    response 0x900, card status 0xb00
    [    1.569314] mmcblk0: retrying using single block read
    [    1.575676] mmcblk0: error -84 transferring data, sector 2, nr 6, cmd
    response 0x900, card status 0x0
    [    1.585202] blk_update_request: I/O error, dev mmcblk0, sector 2
    [    1.591818] mmcblk0: error -84 transferring data, sector 3, nr 5, cmd
    response 0x900, card status 0x0
    [    1.601341] blk_update_request: I/O error, dev mmcblk0, sector 3
    
    This patches fixes this by adding the missing driver type setting.
    
    Fixes: bb8175a8 ("mmc: sdhci: clarify DDR timing mode ...")
    Signed-off-by: default avatarJisheng Zhang <jszhang@marvell.com>
    Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
    Signed-off-by: default avatarLuis Henriques <luis.henriques@canonical.com>
    96351f5e
sdhci.c 86.8 KB