• Vandana Kannan's avatar
    drm/i915/bxt: VSwing programming sequence · 96fb9f9b
    Vandana Kannan authored
    VSwing programming sequence as specified in the updated BXT BSpec
    
    v2: Satheesh's review comments addressed.
    - clear value before setting into registers
    - move print statement to bxt function
    Other changes
    - since signal level will not be set into DDI_BUF_CTL, the value need
      not be returned to intel_dp_set_signal_levels(). Making the bxt
      specific function to return void and setting signal_levels = 0 for
      bxt inside intel_dp_set_signal_levels()
    - instead of signal levels, printing vswing level and pre-emphasis
      level
    - in case none of the pre-emphasis levels or vswing levels are set,
      setting default of 400mV + 0dB
    
    v3: Satheesh's review comments
    - Check for mask before printing signal_levels.
    - Removing redundant register writes
    - Call intel_prepare_ddi_buffers only for HAS_PCH_SPLIT
    - Making register write part generic as it will be required for HDMI as
      well.
    
    Re-structure the code to include an array for vswing related values, set
    signal levels
    
    v4: Satheesh's review comments
    - Rebase over latest renaming patches
    - use hsw_signal_levels for HAS_DDI
    Other changes
    - Modified vswing_sequence() func definition
    - Rebased on top of register macro definitions
    
    v5: Satheesh's review comments
    - Check ddi translation table size
    
    v6: Imre's review comments
    - removed comments in vswing sequence
    - added vswing, pre-emphasis prints in intel_dp_set_signal_levels
    - added comment explaining use of DP vswing values for eDP
    - initialize n_entries and ddi_transaltion table based on encoder type
    - create bxt_ddi_buf_trans structure and use decimal values
    - adding a flag in bxt buffer translation table to indicate def entry
    
    v7: (imre)
    - squash in Vandana's "VSwing register definition",
      "HDMI VSwing programming", "Re-enable vswing programming",
      "Fix vswing sequence" patches
    - use BXT_PORT_* regs directly instead of via a temp var
    - simplify BXT_PORT_* macro definitions
    - add code comment why we read lane while write group registers
    - fix readout of DP_TRAIN_PRE_EMPHASIS in debug message
    
    Signed-off-by: Vandana Kannan <vandana.kannan@intel.com> (v6)
    Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
    Reviewed-by: default avatarSivakumar Thulasimani <sivakumar.thulasimani@intel.com>
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    96fb9f9b
intel_ddi.c 76.1 KB