• Rodrigo Vivi's avatar
    drm/i915: Adjust eDP's logical vco in a reliable place. · 9d219554
    Rodrigo Vivi authored
    On intel_dp_compute_config() we were calculating the needed vco
    for eDP on gen9 and we stashing it in
    intel_atomic_state.cdclk.logical.vco
    
    However few moments later on intel_modeset_checks() we fully
    replace entire intel_atomic_state.cdclk.logical with
    dev_priv->cdclk.logical fully overwriting the logical desired
    vco for eDP on gen9.
    
    So, with wrong VCO value we end up with wrong desired cdclk, but
    also it will raise a lot of WARNs: On gen9, when we read
    CDCLK_CTL to verify if we configured properly the desired
    frequency the CD Frequency Select bits [27:26] == 10b can mean
    337.5 or 308.57 MHz depending on the VCO. So if we have wrong
    VCO value stashed we will believe the frequency selection didn't
    stick and start to raise WARNs of cdclk mismatch.
    
    [   42.857519] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 308571 kHz, VCO 8640000 kHz, ref 24000 kHz, bypass 24000 kHz, voltage level 0
    [   42.897269] cdclk state doesn't match!
    [   42.901052] WARNING: CPU: 5 PID: 1116 at drivers/gpu/drm/i915/intel_cdclk.c:2084 intel_set_cdclk+0x5d/0x110 [i915]
    [   42.938004] RIP: 0010:intel_set_cdclk+0x5d/0x110 [i915]
    [   43.155253] WARNING: CPU: 5 PID: 1116 at drivers/gpu/drm/i915/intel_cdclk.c:2084 intel_set_cdclk+0x5d/0x110 [i915]
    [   43.170277] [drm:intel_dump_cdclk_state [i915]] [hw state] 337500 kHz, VCO 8100000 kHz, ref 24000 kHz, bypass 24000 kHz, voltage level 0
    [   43.182566] [drm:intel_dump_cdclk_state [i915]] [sw state] 308571 kHz, VCO 8640000 kHz, ref 24000 kHz, bypass 24000 kHz, voltage level 0
    
    v2: Move the entire eDP's vco logical adjustment to inside
        the skl_modeset_calc_cdclk as suggested by Ville.
    
    Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
    Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Fixes: bb0f4aab ("drm/i915: Track full cdclk state for the logical and actual cdclk frequencies")
    Cc: <stable@vger.kernel.org> # v4.12+
    Link: https://patchwork.freedesktop.org/patch/msgid/20180502175255.5344-1-rodrigo.vivi@intel.com
    (cherry picked from commit 3297234a)
    Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
    9d219554
intel_dp.c 179 KB