• Stephen Warren's avatar
    ARM: tegra: fix board DT pinmux setup · bf5fd5bf
    Stephen Warren authored
    Neither Tegra114 nor Tegra124 allow "low power mode" to be configured
    on SDIO1 or SDIO3 drive groups. Remove the attempt to configure that
    option from the Dalmore and Venice2 DTs.
    
    The Venice2 DT contained duplicate configurations for most sdmmc1_*
    pins. Remove the duplicate pins from one of the nodes, and fix the
    configuration since the remaining clk pin is output-only.
    Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
    Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
    bf5fd5bf
tegra124-venice2.dts 29.3 KB