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Abhilash Kesavan authored
The sequence of cpu_enter_lowpower() for Cortex-A15 is different from the sequence for Cortex-A9. This patch implements cpu_enter_lowpower() for EXYNOS5 SoC which has Cortex-A15 cores. Basded on original patch has been submitted by Changhwan Youn Signed-off-by: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> [kgene.kim@samsung.com: use flush_cache_louis() instead of flush_cache_all() as per Lorenzo and Santosh's suggestion] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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