• Serge Semin's avatar
    mips: Fix cpu_has_mips64r1/2 activation for MIPS32 CPUs · a2ac81c6
    Serge Semin authored
    Commit 1aeba347 ("MIPS: Hardcode cpu_has_mips* where target ISA
    allows") updated the cpu_has_mips* macro to be replaced with a constant
    expression where it's possible. By mistake it wasn't done correctly
    for cpu_has_mips64r1/cpu_has_mips64r2 macro. They are defined to
    be replaced with conditional expression __isa_range_or_flag(), which
    means either ISA revision being within the range or the corresponding
    CPU options flag was set at the probe stage or both being true at the
    same time. But the ISA level value doesn't indicate whether the ISA is
    MIPS32 or MIPS64. Due to this if we select MIPS32r1 - MIPS32r5
    architectures the __isa_range() macro will activate the
    cpu_has_mips64rX flags, which is incorrect. In order to fix the
    problem we make sure the 64bits CPU support is enabled by means of
    checking the flag cpu_has_64bits aside with proper ISA range and specific
    Revision flag being set.
    
    Fixes: 1aeba347 ("MIPS: Hardcode cpu_has_mips* where target ISA allows")
    Signed-off-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
    Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
    Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
    Cc: Paul Burton <paulburton@kernel.org>
    Cc: Ralf Baechle <ralf@linux-mips.org>
    Cc: Arnd Bergmann <arnd@arndb.de>
    Cc: Rob Herring <robh+dt@kernel.org>
    Cc: devicetree@vger.kernel.org
    Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
    a2ac81c6
cpu-features.h 21.5 KB