Patch for the Marvell MultiProtocol Serial Controller (MPSC).  This ctlr is
on a series of host bridges (and other things) for PPC and MIPS processors.

The ctlr operates similar to a typical network controller with send and
receive rings.  Unfortunately there are many errata so you will see some
"unusual" things in the code.  For example: a) An erratum prevents the
reading of several registers on the ctlr (writing is okay).  To work around
that, a local copy of what the registers are is kept and special macros are
used to access those mirrored values.  b) Another erratum says that the
MPSC cannot be used to access cache coherent memory (and many of the
systems I use are cache coherent).  However, it seems to work okay as long
as there are no snoop hits so there are macros in the code to manually
manage the caches to prevent snoop hits.  Each macro checks a flag to see
if the manual cache mgmt is necessary as not all versions have the erratum.

The driver seems to work well but more testing is needed and it is lacking
KGDB support.  I will get to both of those in time.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>