• Yazen Ghannam's avatar
    RAS: Introduce AMD Address Translation Library · 3f317499
    Yazen Ghannam authored
    AMD Zen-based systems report memory errors through Machine Check banks
    representing Unified Memory Controllers (UMCs). The address value
    reported for DRAM ECC errors is a "normalized address" that is relative
    to the UMC. This normalized address must be converted to a system
    physical address to be usable by the OS.
    
    Support for this address translation was introduced to the MCA subsystem
    with Zen1 systems. The code was later moved to the AMD64 EDAC module,
    since this was the only user of the code at the time.
    
    However, there are uses for this translation outside of EDAC. The system
    physical address can be used in MCA for preemptive page offlining as done
    in some MCA notifier functions. Also, this translation is needed as the
    basis of similar functionality needed for some CXL configurations on AMD
    systems.
    
    Introduce a common address translation library that can be used for
    multiple subsystems including MCA, EDAC, and CXL.
    
    Include support for UMC normalized to system physical address
    translation for current CPU systems.
    
    The Data Fabric Indirect register access offsets and one of the register
    fields were changed. Default to the current offsets and register field
    definition. And fallback to the older values if running on a "legacy"
    system.
    
    Provide built-in code to facilitate the loading and unloading of the
    library module without affecting other modules or built-in code.
    Signed-off-by: default avatarYazen Ghannam <yazen.ghannam@amd.com>
    Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
    Link: https://lore.kernel.org/r/20240123041401.79812-2-yazen.ghannam@amd.com
    3f317499
ras.c 1.95 KB