• Daniel Baluta's avatar
    ASoC: SOF: imx8: Fix dsp_box offset · dcf08d0f
    Daniel Baluta authored
    dsp_box is used to keep DSP initiated messages. The value of dsp_offset
    is set by the DSP with the first message, so we need a way to bootstrap
    it in order to get the first message.
    
    We do this by setting the correct default dsp_box offset which on i.MX8
    is not zero.
    
    Very interesting is why it has worked until now.
    
    On i.MX8, DSP communicates with ARM core using a shared SDRAM memory
    area. Actually, there are two shared areas:
    	* SDRAM0 - starting at 0x92400000, size 0x800000
    	* SDRAM1 - starting at 0x92C00000, size 0x800000
    
    SDRAM0 keeps the data sections, starting with .rodata. By chance
    fw_ready structure was placed at the beginning of .rodata.
    
    dsp_box_base is defined as SDRAM0 + dsp_box_offset and it is placed
    at the beginning of SDRAM1 (dsp_box_offset should be 0x800000). But
    because it is zero initialized by default it points to SDRAM0 where
    by chance the fw_ready was placed in the SOF firmware.
    
    Anyhow, SOF commit 7466bee378dd811b ("clk: make freq arrays constant")
    fw_ready is no longer at the beginning of SDRAM0 and everything shows
    how lucky we were until now.
    
    Fix this by properly setting the default dsp_box offset.
    
    Fixes: 202acc56 ("ASoC: SOF: imx: Add i.MX8 HW support")
    Signed-off-by: default avatarDaniel Baluta <daniel.baluta@nxp.com>
    Signed-off-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
    Link: https://lore.kernel.org/r/20191220170531.10423-1-pierre-louis.bossart@linux.intel.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
    dcf08d0f
imx8.c 9.63 KB