• Stefan Agner's avatar
    ARM: imx: clk-vf610: define PLL's clock tree · c72c5532
    Stefan Agner authored
    So far, the required PLL's (PLL1/PLL2/PLL5) have been initialized
    by boot loader and the kernel code defined fixed rates according
    to those default configurations. Beginning with the USB PLL7 the
    code started to initialize the PLL's itself (using imx_clk_pllv3).
    
    However, since commit dc4805c2
    (ARM: imx: remove ENABLE and BYPASS bits from clk-pllv3 driver)
    imx_clk_pllv3 no longer takes care of the ENABLE and BYPASS bits,
    hence the USB PLL were not configured correctly anymore.
    
    This patch not only fixes those USB PLL's, but also makes use of
    the imx_clk_pllv3 for all PLL's and alignes the code with the PLL
    support of the i.MX6 series.
    Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
    Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
    c72c5532
clk-vf610.c 23.3 KB