• Russell King's avatar
    ARM: redo TTBR setup code for LPAE · b2c3e38a
    Russell King authored
    Re-engineer the LPAE TTBR setup code.  Rather than passing some shifted
    address in order to fit in a CPU register, pass either a full physical
    address (in the case of r4, r5 for TTBR0) or a PFN (for TTBR1).
    
    This removes the ARCH_PGD_SHIFT hack, and the last dangerous user of
    cpu_set_ttbr() in the secondary CPU startup code path (which was there
    to re-set TTBR1 to the appropriate high physical address space on
    Keystone2.)
    Tested-by: default avatarMurali Karicheri <m-karicheri2@ti.com>
    Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
    b2c3e38a
head.S 18.9 KB